vhdl – i keep on getting these erros when i try to program the FPGA on the MachX03 series development board. Can someone please help me fix these?

This is my code; library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity CC2510_prac3 is port(clkin: in std_logic; reset: in std_logic; SW3: in std_logic; SW2: in std_logic; SW1: in std_logic; com: out std_logic; D2_out: out std_logic_vector(6 downto 0); D1_out: out std_logic_vector(6 downto 0); D0_out: out std_logic_vector(6 downto 0); DP1_out: out std_logic; DP2_out: out std_logic; LED_out: … Read more